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@ -26,6 +26,7 @@
@@ -26,6 +26,7 @@
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---- 2016/11/04: adding lfsr sub-component test ressources |
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---- 2016/11/05: adding mapper sub-component test ressources |
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---- 2016/11/08: adding srrc + filter sub-component test ressources |
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---- 2016/11/18: adding differential coder sub-component |
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------------------------------- |
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--TODO: functions for sub-components interactions and checks (wb_read, wb_write, buffer_read, ...) |
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@ -51,6 +52,9 @@ entity ccsds_rxtx_bench is
@@ -51,6 +52,9 @@ entity ccsds_rxtx_bench is
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-- BUFFER |
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CCSDS_RXTX_BENCH_BUFFER0_DATA_BUS_SIZE : integer := 32; |
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CCSDS_RXTX_BENCH_BUFFER0_SIZE : integer := 16; |
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-- CODER DIFFERENTIAL |
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CCSDS_RXTX_BENCH_CODER_DIFF0_BITS_PER_CODEWORD: integer := 4; |
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CCSDS_RXTX_BENCH_CODER_DIFF0_DATA_BUS_SIZE: integer := 32; |
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-- CRC |
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CCSDS_RXTX_BENCH_CRC0_DATA: std_logic_vector := x"313233343536373839"; |
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CCSDS_RXTX_BENCH_CRC0_INPUT_BYTES_REFLECTED: boolean := false; |
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@ -64,8 +68,7 @@ entity ccsds_rxtx_bench is
@@ -64,8 +68,7 @@ entity ccsds_rxtx_bench is
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CCSDS_RXTX_BENCH_CRC0_XOR: std_logic_vector := x"0000"; |
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-- FILTER |
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CCSDS_RXTX_BENCH_FILTER0_MAPPER_DATA_BUS_SIZE: integer := 32; |
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CCSDS_RXTX_BENCH_FILTER0_MAPPER_DIFFERENTIAL_CODER: boolean := false; |
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CCSDS_RXTX_BENCH_FILTER0_OFFSET_PSK: boolean := true; |
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CCSDS_RXTX_BENCH_FILTER0_OFFSET_IQ: boolean := true; |
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CCSDS_RXTX_BENCH_FILTER0_OVERSAMPLING_RATIO: integer := 4; |
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CCSDS_RXTX_BENCH_FILTER0_ROLL_OFF: real := 0.5; |
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CCSDS_RXTX_BENCH_FILTER0_SIG_QUANT_DEPTH: integer := 16; |
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@ -86,7 +89,6 @@ entity ccsds_rxtx_bench is
@@ -86,7 +89,6 @@ entity ccsds_rxtx_bench is
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-- MAPPER |
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CCSDS_RXTX_BENCH_MAPPER0_BITS_PER_SYMBOL: integer := 2; |
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CCSDS_RXTX_BENCH_MAPPER0_DATA_BUS_SIZE: integer := 32; |
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CCSDS_RXTX_BENCH_MAPPER0_DIFFERENTIAL_CODER: boolean := true; |
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CCSDS_RXTX_BENCH_MAPPER0_MODULATION_TYPE: integer := 1; |
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-- SERDES |
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CCSDS_RXTX_BENCH_SERDES0_DEPTH: integer := 32; |
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@ -97,6 +99,8 @@ entity ccsds_rxtx_bench is
@@ -97,6 +99,8 @@ entity ccsds_rxtx_bench is
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CCSDS_RXTX_BENCH_SRRC0_SIG_QUANT_DEPTH: integer := 16; |
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-- simulation/test parameters |
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CCSDS_RXTX_BENCH_BUFFER0_CLK_PERIOD: time := 10 ns; |
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CCSDS_RXTX_BENCH_CODER_DIFF0_CLK_PERIOD: time := 10 ns; |
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CCSDS_RXTX_BENCH_CODER_DIFF0_WORDS_NUMBER: integer := 1000; |
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CCSDS_RXTX_BENCH_CRC0_CLK_PERIOD: time := 10 ns; |
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CCSDS_RXTX_BENCH_CRC0_RANDOM_DATA_BUS_SIZE: integer:= 8; |
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CCSDS_RXTX_BENCH_CRC0_RANDOM_CHECK_NUMBER: integer:= 25; |
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@ -106,6 +110,7 @@ entity ccsds_rxtx_bench is
@@ -106,6 +110,7 @@ entity ccsds_rxtx_bench is
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CCSDS_RXTX_BENCH_FRAMER0_FRAME_NUMBER: integer := 25; |
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CCSDS_RXTX_BENCH_LFSR0_CLK_PERIOD: time := 10 ns; |
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CCSDS_RXTX_BENCH_MAPPER0_CLK_PERIOD: time := 10 ns; |
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CCSDS_RXTX_BENCH_MAPPER0_WORDS_NUMBER: integer := 1000; |
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CCSDS_RXTX_BENCH_RXTX0_WB_CLK_PERIOD: time := 20 ns; |
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CCSDS_RXTX_BENCH_RXTX0_WB_TX_WRITE_CYCLE_NUMBER: integer := 5000; |
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CCSDS_RXTX_BENCH_RXTX0_WB_TX_OVERFLOW: boolean := true; |
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@ -114,6 +119,7 @@ entity ccsds_rxtx_bench is
@@ -114,6 +119,7 @@ entity ccsds_rxtx_bench is
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CCSDS_RXTX_BENCH_SERDES0_CYCLES_NUMBER: integer := 25; |
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CCSDS_RXTX_BENCH_SRRC0_CLK_PERIOD: time := 10 ns; |
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CCSDS_RXTX_BENCH_START_BUFFER_WAIT_DURATION: time := 2000 ns; |
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CCSDS_RXTX_BENCH_START_CODER_DIFF_WAIT_DURATION: time := 2000 ns; |
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CCSDS_RXTX_BENCH_START_CRC_WAIT_DURATION: time := 2000 ns; |
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CCSDS_RXTX_BENCH_START_FILTER_WAIT_DURATION: time := 2000 ns; |
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CCSDS_RXTX_BENCH_START_FRAMER_WAIT_DURATION: time := 2000 ns; |
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@ -151,6 +157,8 @@ architecture behaviour of ccsds_rxtx_bench is
@@ -151,6 +157,8 @@ architecture behaviour of ccsds_rxtx_bench is
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rx_irq_o: out std_logic; |
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tx_clk_i: in std_logic; |
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tx_dat_ser_i: in std_logic; |
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tx_buf_ful_o: out std_logic; |
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tx_idl_o: out std_logic; |
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tx_sam_i_o: out std_logic_vector(CCSDS_RXTX_BENCH_RXTX0_TX_PHYS_SIG_QUANT_DEPTH-1 downto 0); |
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tx_sam_q_o: out std_logic_vector(CCSDS_RXTX_BENCH_RXTX0_TX_PHYS_SIG_QUANT_DEPTH-1 downto 0); |
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tx_clk_o: out std_logic; |
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@ -174,17 +182,31 @@ architecture behaviour of ccsds_rxtx_bench is
@@ -174,17 +182,31 @@ architecture behaviour of ccsds_rxtx_bench is
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dat_val_o: out std_logic |
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); |
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end component; |
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component ccsds_tx_coder_differential is |
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generic( |
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CCSDS_TX_CODER_DIFF_BITS_PER_CODEWORD: integer; |
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CCSDS_TX_CODER_DIFF_DATA_BUS_SIZE: integer |
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); |
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port( |
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clk_i: in std_logic; |
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dat_i: in std_logic_vector(CCSDS_TX_CODER_DIFF_DATA_BUS_SIZE-1 downto 0); |
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dat_val_i: in std_logic; |
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rst_i: in std_logic; |
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dat_o: out std_logic_vector(CCSDS_TX_CODER_DIFF_DATA_BUS_SIZE-1 downto 0); |
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dat_val_o: out std_logic |
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); |
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end component; |
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component ccsds_rxtx_crc is |
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generic( |
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constant CCSDS_RXTX_CRC_DATA_LENGTH: integer; |
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constant CCSDS_RXTX_CRC_FINAL_XOR: std_logic_vector; |
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constant CCSDS_RXTX_CRC_INPUT_BYTES_REFLECTED: boolean; |
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constant CCSDS_RXTX_CRC_INPUT_REFLECTED: boolean; |
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constant CCSDS_RXTX_CRC_LENGTH: integer; |
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constant CCSDS_RXTX_CRC_OUTPUT_REFLECTED: boolean; |
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constant CCSDS_RXTX_CRC_POLYNOMIAL: std_logic_vector; |
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constant CCSDS_RXTX_CRC_POLYNOMIAL_REFLECTED: boolean; |
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constant CCSDS_RXTX_CRC_SEED: std_logic_vector |
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generic( |
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CCSDS_RXTX_CRC_DATA_LENGTH: integer; |
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CCSDS_RXTX_CRC_FINAL_XOR: std_logic_vector; |
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CCSDS_RXTX_CRC_INPUT_BYTES_REFLECTED: boolean; |
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CCSDS_RXTX_CRC_INPUT_REFLECTED: boolean; |
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CCSDS_RXTX_CRC_LENGTH: integer; |
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CCSDS_RXTX_CRC_OUTPUT_REFLECTED: boolean; |
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CCSDS_RXTX_CRC_POLYNOMIAL: std_logic_vector; |
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CCSDS_RXTX_CRC_POLYNOMIAL_REFLECTED: boolean; |
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CCSDS_RXTX_CRC_SEED: std_logic_vector |
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); |
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port( |
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clk_i: in std_logic; |
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@ -201,7 +223,7 @@ architecture behaviour of ccsds_rxtx_bench is
@@ -201,7 +223,7 @@ architecture behaviour of ccsds_rxtx_bench is
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end component; |
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component ccsds_tx_filter is |
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generic( |
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CCSDS_TX_FILTER_OFFSET_PSK: boolean; |
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CCSDS_TX_FILTER_OFFSET_IQ: boolean; |
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CCSDS_TX_FILTER_OVERSAMPLING_RATIO: integer; |
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CCSDS_TX_FILTER_SIG_QUANT_DEPTH: integer; |
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CCSDS_TX_FILTER_MODULATION_TYPE: integer; |
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@ -255,7 +277,6 @@ architecture behaviour of ccsds_rxtx_bench is
@@ -255,7 +277,6 @@ architecture behaviour of ccsds_rxtx_bench is
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component ccsds_tx_mapper is |
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generic( |
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CCSDS_TX_MAPPER_DATA_BUS_SIZE: integer; |
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CCSDS_TX_MAPPER_DIFFERENTIAL_CODER: boolean; |
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CCSDS_TX_MAPPER_MODULATION_TYPE: integer; |
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CCSDS_TX_MAPPER_BITS_PER_SYMBOL: integer |
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); |
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@ -312,6 +333,7 @@ architecture behaviour of ccsds_rxtx_bench is
@@ -312,6 +333,7 @@ architecture behaviour of ccsds_rxtx_bench is
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constant CCSDS_RXTX_BENCH_RXTX0_RX_CLK_PERIOD: time := CCSDS_RXTX_BENCH_RXTX0_TX_CLK_PERIOD; |
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-- internal variables |
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signal bench_ena_buffer0_random_data: std_logic := '0'; |
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signal bench_ena_coder_diff0_random_data: std_logic := '0'; |
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signal bench_ena_crc0_random_data: std_logic := '0'; |
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signal bench_ena_filter0_random_data: std_logic := '0'; |
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signal bench_ena_framer0_random_data: std_logic := '0'; |
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@ -344,6 +366,11 @@ architecture behaviour of ccsds_rxtx_bench is
@@ -344,6 +366,11 @@ architecture behaviour of ccsds_rxtx_bench is
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signal bench_sti_buffer0_next_data: std_logic; |
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signal bench_sti_buffer0_data: std_logic_vector(CCSDS_RXTX_BENCH_BUFFER0_DATA_BUS_SIZE-1 downto 0); |
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signal bench_sti_buffer0_data_valid: std_logic; |
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-- coder differential |
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signal bench_sti_coder_diff0_clk: std_logic; |
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signal bench_sti_coder_diff0_rst: std_logic; |
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signal bench_sti_coder_diff0_dat: std_logic_vector(CCSDS_RXTX_BENCH_CODER_DIFF0_DATA_BUS_SIZE-1 downto 0); |
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signal bench_sti_coder_diff0_dat_val: std_logic; |
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-- crc |
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signal bench_sti_crc0_clk: std_logic; |
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signal bench_sti_crc0_rst: std_logic; |
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@ -402,6 +429,8 @@ architecture behaviour of ccsds_rxtx_bench is
@@ -402,6 +429,8 @@ architecture behaviour of ccsds_rxtx_bench is
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signal bench_res_rxtx0_rx_irq: std_logic; |
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-- tx |
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signal bench_res_rxtx0_tx_clk: std_logic; |
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signal bench_res_rxtx0_tx_buf_ful: std_logic; |
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signal bench_res_rxtx0_tx_idl: std_logic; |
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signal bench_res_rxtx0_tx_samples_i: std_logic_vector(CCSDS_RXTX_BENCH_RXTX0_TX_PHYS_SIG_QUANT_DEPTH-1 downto 0); |
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signal bench_res_rxtx0_tx_samples_q: std_logic_vector(CCSDS_RXTX_BENCH_RXTX0_TX_PHYS_SIG_QUANT_DEPTH-1 downto 0); |
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signal bench_res_rxtx0_tx_ena: std_logic; |
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@ -410,6 +439,9 @@ architecture behaviour of ccsds_rxtx_bench is
@@ -410,6 +439,9 @@ architecture behaviour of ccsds_rxtx_bench is
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signal bench_res_buffer0_buffer_full: std_logic; |
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signal bench_res_buffer0_data: std_logic_vector(CCSDS_RXTX_BENCH_BUFFER0_DATA_BUS_SIZE-1 downto 0); |
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signal bench_res_buffer0_data_valid: std_logic; |
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-- coder differential |
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signal bench_res_coder_diff0_dat: std_logic_vector(CCSDS_RXTX_BENCH_CODER_DIFF0_DATA_BUS_SIZE-1 downto 0); |
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signal bench_res_coder_diff0_dat_val: std_logic; |
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-- crc |
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signal bench_res_crc0_busy: std_logic; |
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signal bench_res_crc0_crc: std_logic_vector(CCSDS_RXTX_BENCH_CRC0_LENGTH*8-1 downto 0); |
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@ -483,6 +515,8 @@ architecture behaviour of ccsds_rxtx_bench is
@@ -483,6 +515,8 @@ architecture behaviour of ccsds_rxtx_bench is
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tx_sam_i_o => bench_res_rxtx0_tx_samples_i, |
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tx_sam_q_o => bench_res_rxtx0_tx_samples_q, |
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tx_clk_o => bench_res_rxtx0_tx_clk, |
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tx_buf_ful_o => bench_res_rxtx0_tx_buf_ful, |
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tx_idl_o => bench_res_rxtx0_tx_idl, |
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tx_ena_o => bench_res_rxtx0_tx_ena |
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); |
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-- Instance(s) of sub-components under test |
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@ -502,6 +536,19 @@ architecture behaviour of ccsds_rxtx_bench is
@@ -502,6 +536,19 @@ architecture behaviour of ccsds_rxtx_bench is
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dat_nxt_i => bench_sti_buffer0_next_data, |
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dat_o => bench_res_buffer0_data |
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); |
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coder_differential_000: ccsds_tx_coder_differential |
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generic map( |
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CCSDS_TX_CODER_DIFF_BITS_PER_CODEWORD => CCSDS_RXTX_BENCH_CODER_DIFF0_BITS_PER_CODEWORD, |
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CCSDS_TX_CODER_DIFF_DATA_BUS_SIZE => CCSDS_RXTX_BENCH_CODER_DIFF0_DATA_BUS_SIZE |
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) |
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port map( |
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clk_i => bench_sti_coder_diff0_clk, |
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rst_i => bench_sti_coder_diff0_rst, |
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dat_val_i => bench_sti_coder_diff0_dat_val, |
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dat_i => bench_sti_coder_diff0_dat, |
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dat_val_o => bench_res_coder_diff0_dat_val, |
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dat_o => bench_res_coder_diff0_dat |
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); |
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crc_000: ccsds_rxtx_crc |
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generic map( |
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CCSDS_RXTX_CRC_DATA_LENGTH => CCSDS_RXTX_BENCH_CRC0_DATA'length/8, |
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@ -577,7 +624,7 @@ architecture behaviour of ccsds_rxtx_bench is
@@ -577,7 +624,7 @@ architecture behaviour of ccsds_rxtx_bench is
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filter000: ccsds_tx_filter |
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generic map( |
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CCSDS_TX_FILTER_OVERSAMPLING_RATIO => CCSDS_RXTX_BENCH_FILTER0_OVERSAMPLING_RATIO, |
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CCSDS_TX_FILTER_OFFSET_PSK => CCSDS_RXTX_BENCH_FILTER0_OFFSET_PSK, |
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CCSDS_TX_FILTER_OFFSET_IQ => CCSDS_RXTX_BENCH_FILTER0_OFFSET_IQ, |
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CCSDS_TX_FILTER_SIG_QUANT_DEPTH => CCSDS_RXTX_BENCH_FILTER0_SIG_QUANT_DEPTH, |
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CCSDS_TX_FILTER_MODULATION_TYPE => CCSDS_RXTX_BENCH_FILTER0_MODULATION_TYPE, |
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CCSDS_TX_FILTER_BITS_PER_SYMBOL => CCSDS_RXTX_BENCH_FILTER0_BITS_PER_SYMBOL |
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@ -628,7 +675,6 @@ architecture behaviour of ccsds_rxtx_bench is
@@ -628,7 +675,6 @@ architecture behaviour of ccsds_rxtx_bench is
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generic map( |
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CCSDS_TX_MAPPER_DATA_BUS_SIZE => CCSDS_RXTX_BENCH_MAPPER0_DATA_BUS_SIZE, |
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CCSDS_TX_MAPPER_MODULATION_TYPE => CCSDS_RXTX_BENCH_MAPPER0_MODULATION_TYPE, |
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CCSDS_TX_MAPPER_DIFFERENTIAL_CODER => CCSDS_RXTX_BENCH_MAPPER0_DIFFERENTIAL_CODER, |
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CCSDS_TX_MAPPER_BITS_PER_SYMBOL => CCSDS_RXTX_BENCH_MAPPER0_BITS_PER_SYMBOL |
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) |
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port map( |
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@ -644,8 +690,7 @@ architecture behaviour of ccsds_rxtx_bench is
@@ -644,8 +690,7 @@ architecture behaviour of ccsds_rxtx_bench is
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generic map( |
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CCSDS_TX_MAPPER_DATA_BUS_SIZE => CCSDS_RXTX_BENCH_FILTER0_MAPPER_DATA_BUS_SIZE, |
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CCSDS_TX_MAPPER_MODULATION_TYPE => CCSDS_RXTX_BENCH_FILTER0_MODULATION_TYPE, |
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CCSDS_TX_MAPPER_BITS_PER_SYMBOL => CCSDS_RXTX_BENCH_FILTER0_BITS_PER_SYMBOL, |
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CCSDS_TX_MAPPER_DIFFERENTIAL_CODER => CCSDS_RXTX_BENCH_FILTER0_MAPPER_DIFFERENTIAL_CODER |
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CCSDS_TX_MAPPER_BITS_PER_SYMBOL => CCSDS_RXTX_BENCH_FILTER0_BITS_PER_SYMBOL |
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) |
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port map( |
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clk_i => bench_sti_filter0_mapper_clk, |
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@ -790,6 +835,20 @@ architecture behaviour of ccsds_rxtx_bench is
@@ -790,6 +835,20 @@ architecture behaviour of ccsds_rxtx_bench is
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wait for CCSDS_RXTX_BENCH_BUFFER0_CLK_PERIOD/2; |
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end process; |
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--============================================================================= |
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-- Begin of bench_sti_coder_diff0_clk |
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-- bench_sti_coder_diff0_clk generation |
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--============================================================================= |
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-- read: |
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-- write: bench_sti_coder_diff0_clk |
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-- r/w: |
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BENCH_STI_CODER_DIFF0_CLKP : process |
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begin |
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bench_sti_coder_diff0_clk <= '1'; |
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wait for CCSDS_RXTX_BENCH_CODER_DIFF0_CLK_PERIOD/2; |
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bench_sti_coder_diff0_clk <= '0'; |
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wait for CCSDS_RXTX_BENCH_CODER_DIFF0_CLK_PERIOD/2; |
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end process; |
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--============================================================================= |
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-- Begin of bench_sti_crc0_clkp |
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-- bench_sti_crc0_clk generation |
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--============================================================================= |
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@ -938,6 +997,25 @@ architecture behaviour of ccsds_rxtx_bench is
@@ -938,6 +997,25 @@ architecture behaviour of ccsds_rxtx_bench is
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wait for CCSDS_RXTX_BENCH_BUFFER0_CLK_PERIOD; |
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end process; |
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--============================================================================= |
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-- Begin of bench_sti_coder_diff0_datap |
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-- bench_sti_coder_diff0_random_data generation |
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--============================================================================= |
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-- read: bench_ena_coder_diff0_random_data |
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-- write: bench_sti_coder_diff0_dat |
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-- r/w: |
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BENCH_STI_CODER_DIFF0_DATAP : process |
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variable seed1, seed2 : positive := CCSDS_RXTX_BENCH_SEED; |
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variable random : std_logic_vector(CCSDS_RXTX_BENCH_CODER_DIFF0_DATA_BUS_SIZE-1 downto 0); |
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begin |
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if (bench_ena_coder_diff0_random_data = '1') then |
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sim_generate_random_std_logic_vector(CCSDS_RXTX_BENCH_CODER_DIFF0_DATA_BUS_SIZE,seed1,seed2,random); |
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sim_generate_random_std_logic_vector(CCSDS_RXTX_BENCH_CODER_DIFF0_DATA_BUS_SIZE,seed1,seed2,random); |
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bench_sti_coder_diff0_dat <= random; |
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end if; |
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wait for CCSDS_RXTX_BENCH_CRC0_CLK_PERIOD; |
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end process; |
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--============================================================================= |
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-- Begin of bench_sti_crc0_datap |
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-- bench_sti_crc0_random_data generation |
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--============================================================================= |
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@ -1235,6 +1313,50 @@ architecture behaviour of ccsds_rxtx_bench is
@@ -1235,6 +1313,50 @@ architecture behaviour of ccsds_rxtx_bench is
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wait; |
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end process; |
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--============================================================================= |
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-- Begin of coderdiffp |
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-- generation of coder differential subsystem unit-tests |
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--============================================================================= |
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-- read: bench_res_coder_diff0_dat, bench_res_coder_diff0_dat_val |
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-- write: bench_ena_coder_diff0_random_data, bench_sti_coder_diff0_dat_val |
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-- r/w: |
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CODERDIFFP : process |
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begin |
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-- let the system free run |
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wait for (CCSDS_RXTX_BENCH_START_FREE_RUN_DURATION/2); |
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-- default state tests: |
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|
if (bench_res_coder_diff0_dat_val = '1') then |
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|
report "CODERDIFFP: KO - Default state - Differential coder output data is valid" severity warning; |
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else |
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report "CODERDIFFP: OK - Default state - Differential coder output data is not valid" severity note; |
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end if; |
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-- let the system reset |
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|
wait for (CCSDS_RXTX_BENCH_START_FREE_RUN_DURATION/2 + CCSDS_RXTX_BENCH_START_RESET_SIG_DURATION + CCSDS_RXTX_BENCH_START_CODER_DIFF_WAIT_DURATION); |
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|
-- initial state tests: |
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|
|
if (bench_res_coder_diff0_dat_val = '1') then |
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|
report "CODERDIFFP: KO - Initial state - Differential coder output data is valid" severity warning; |
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else |
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|
report "CODERDIFFP: OK - Initial state - Differential coder output data is not valid" severity note; |
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end if; |
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|
|
-- behaviour tests: |
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|
report "CODERDIFFP: START DIFFERENTIAL CODER TESTS" severity note; |
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|
bench_ena_coder_diff0_random_data <= '1'; |
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|
wait for CCSDS_RXTX_BENCH_CODER_DIFF0_CLK_PERIOD; |
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bench_sti_coder_diff0_dat_val <= '1'; |
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wait for CCSDS_RXTX_BENCH_CODER_DIFF0_CLK_PERIOD*CCSDS_RXTX_BENCH_CODER_DIFF0_WORDS_NUMBER; |
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bench_sti_coder_diff0_dat_val <= '0'; |
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bench_ena_coder_diff0_random_data <= '0'; |
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|
wait for CCSDS_RXTX_BENCH_CODER_DIFF0_CLK_PERIOD; |
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|
|
-- final state tests: |
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|
|
if (bench_res_coder_diff0_dat_val = '1') then |
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|
|
report "CODERDIFFP: KO - Final state - Differential coder output data is valid" severity warning; |
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else |
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|
report "CODERDIFFP: OK - Final state - Differential coder output data is not valid" severity note; |
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end if; |
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|
report "CODERDIFFP: END DIFFERENTIAL CODER TESTS" severity note; |
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|
-- do nothing |
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|
wait; |
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end process; |
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|
|
--============================================================================= |
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|
|
-- Begin of crcp |
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|
|
-- generation of crc subsystem unit-tests |
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|
|
|
--============================================================================= |
|
|
|
@ -1661,15 +1783,34 @@ architecture behaviour of ccsds_rxtx_bench is
@@ -1661,15 +1783,34 @@ architecture behaviour of ccsds_rxtx_bench is
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|
|
-- let the system free run |
|
|
|
|
wait for (CCSDS_RXTX_BENCH_START_FREE_RUN_DURATION/2); |
|
|
|
|
-- default state tests: |
|
|
|
|
if (bench_res_mapper0_sym_val = '1') then |
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|
|
report "MAPPERP: KO - Default state - Mapper output data is valid" severity warning; |
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|
else |
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|
|
report "MAPPERP: OK - Default state - Mapper output data is not valid" severity note; |
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|
end if; |
|
|
|
|
-- let the system reset |
|
|
|
|
wait for (CCSDS_RXTX_BENCH_START_FREE_RUN_DURATION/2 + CCSDS_RXTX_BENCH_START_RESET_SIG_DURATION + CCSDS_RXTX_BENCH_START_MAPPER_WAIT_DURATION); |
|
|
|
|
-- initial state tests: |
|
|
|
|
if (bench_res_mapper0_sym_val = '1') then |
|
|
|
|
report "MAPPERP: KO - Initial state - Mapper output data is valid" severity warning; |
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|
|
|
else |
|
|
|
|
report "MAPPERP: OK - Initial state - Mapper output data is not valid" severity note; |
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|
|
|
end if; |
|
|
|
|
-- behaviour tests: |
|
|
|
|
report "MAPPERP: START MAPPER TESTS" severity note; |
|
|
|
|
bench_ena_mapper0_random_data <= '1'; |
|
|
|
|
wait for CCSDS_RXTX_BENCH_MAPPER0_DATA_CLK_PERIOD; |
|
|
|
|
bench_sti_mapper0_dat_val <= '1'; |
|
|
|
|
wait for CCSDS_RXTX_BENCH_MAPPER0_DATA_CLK_PERIOD*CCSDS_RXTX_BENCH_MAPPER0_DATA_BUS_SIZE/CCSDS_RXTX_BENCH_MAPPER0_BITS_PER_SYMBOL*CCSDS_RXTX_BENCH_MAPPER0_WORDS_NUMBER; |
|
|
|
|
bench_sti_mapper0_dat_val <= '0'; |
|
|
|
|
bench_ena_mapper0_random_data <= '0'; |
|
|
|
|
wait for CCSDS_RXTX_BENCH_MAPPER0_DATA_CLK_PERIOD; |
|
|
|
|
-- final state tests: |
|
|
|
|
if (bench_res_mapper0_sym_val = '1') then |
|
|
|
|
report "MAPPERP: KO - Final state - Mapper output data is valid" severity warning; |
|
|
|
|
else |
|
|
|
|
report "MAPPERP: OK - Final state - Mapper output data is not valid" severity note; |
|
|
|
|
end if; |
|
|
|
|
report "MAPPERP: END MAPPER TESTS" severity note; |
|
|
|
|
-- do nothing |
|
|
|
|
wait; |
|
|
|
@ -1956,6 +2097,7 @@ architecture behaviour of ccsds_rxtx_bench is
@@ -1956,6 +2097,7 @@ architecture behaviour of ccsds_rxtx_bench is
|
|
|
|
|
report "RESETP: START RESET SIGNAL TEST" severity note; |
|
|
|
|
-- send reset signals |
|
|
|
|
bench_sti_rxtx0_wb_rst <= '1'; |
|
|
|
|
bench_sti_coder_diff0_rst <= '1'; |
|
|
|
|
bench_sti_crc0_rst <= '1'; |
|
|
|
|
bench_sti_buffer0_rst <= '1'; |
|
|
|
|
bench_sti_filter0_rst <= '1'; |
|
|
|
@ -1968,6 +2110,7 @@ architecture behaviour of ccsds_rxtx_bench is
@@ -1968,6 +2110,7 @@ architecture behaviour of ccsds_rxtx_bench is
|
|
|
|
|
report "RESETP: END RESET SIGNAL TEST" severity note; |
|
|
|
|
-- stop reset signals |
|
|
|
|
bench_sti_rxtx0_wb_rst <= '0'; |
|
|
|
|
bench_sti_coder_diff0_rst <= '0'; |
|
|
|
|
bench_sti_crc0_rst <= '0'; |
|
|
|
|
bench_sti_buffer0_rst <= '0'; |
|
|
|
|
bench_sti_filter0_rst <= '0'; |
|
|
|
|